DENG Huirong,JIANG Ruifeng,SONG Yexi,et al.A Reference Frequency Multiplier for Adaptive Adjustment of Duty Cycle in Phase-Locked Loops[J].Journal of Chengdu University of Information Technology,2025,40(05):613-618.[doi:10.16836/j.cnki.jcuit.2025.05.007]
一种应用于锁相环的占空比自适应调节的参考倍频器
- Title:
- A Reference Frequency Multiplier for Adaptive Adjustment of Duty Cycle in Phase-Locked Loops
- 文章编号:
- 2096-1618(2025)05-0613-06
- Keywords:
- reference frequency multiplier; adaptive duty cycle; phase locked loop; low phase noise; low spurious
- 分类号:
- TN432
- 文献标志码:
- A
- 摘要:
- 在锁相环系统中,提高参考频率可以有效降低射频端口相位噪声,在输入参考频率受限的情况下,通常利用参考倍频器来实现频率的倍增。提出一种集成数模混合的占空比自适应调节的参考倍频器,该电路主要由占空比检测电路和占空比控制电路组成。占空比检测模块采用256位时间-数字转换器(TDC)结构,将输入信号高电平长度转化为数字“1”的长度实现占空比检测的目的,再通过多级反相器构成的占空比控制回路进行占空比校正。解决传统参考时钟倍频器输入信号占空比偏离50%,会引起倍频后的信号奇数周期和偶数周期不相等,从而引入更多杂散,恶化锁相环噪声性能的问题。电路采用SMIC55工艺实现,仿真结果表明,该电路能在输入信号20～150 MHz输入占空比30%～85%下,将输出占空比修正为(50±0.5)%。电路在电源电压1.2 V条件下,功耗为3 mW,整体面积0.029 mm2。
- Abstract:
- In a phase-locked loop system,increasing the reference frequency can effectively reduce the RF port phase noise.When the input reference frequency is limited,a reference frequency multiplier is usually used to achieve frequency multiplication.This paper proposes a reference frequency multiplier with integrated digital-analog hybrid adaptive duty cycle adjustment.The circuit is mainly composed of a duty cycle detection circuit and a duty cycle control circuit.The duty cycle detection module uses a 256-bit time-to-digital converter(TDC)structure to convert the high-level length of the input signal into the length of the digital “1” to achieve the purpose of duty cycle detection,and then through a multi-stage inverter.The duty cycle control loop performs duty cycle correction.It solves the problem that the duty cycle of the input signal of the traditional reference clock multiplier deviates from 50%,which will cause the odd and even periods of the multiplied signal to be unequal,thereby introducing more spurs and deteriorating the noise performance of the phase-locked loop.The circuit is implemented using SMIC55 technology.The simulation results show that the circuit can correct the output duty cycle to(50±0.5)% when the input signal is in the range of 20-150 MHz and the input duty cycle is in the range of 30%-85%.Circuit:Under the condition of power supply voltage 1.2 V,the power consumption is3 mW and the overall area is 0.029 mm2.
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备注/Memo
收稿日期:2024-04-26